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A single-chip false target radar image generator for countering wideband imaging radars
Swedish National Defence College, Department of Military Studies, Military-Technology Division.
2002 (English)In: IEEE Journal of Solid-State Circuits, ISSN 0018-9200, Vol. 37, no 6, 751-759 p.Article in journal (Refereed) Published
Abstract [en]

This paper describes the theory, design, implementation, simulation, and testing of an ASIC capable of generating false target radar images for countering wideband synthetic aperture and inverse synthetic aperture imaging radars. The 5.5 x 6.1 mm IC has 81632 transistors, 132 I/O pins, and consumes 0.132 W at 70 MHz from a 3.3-V supply. An introduction to the application and operation of the ASIC in an electronic attack system is also presented. The false target image is fully programmable and the chip is capable of generating images of both small and large targets, even up to the size of an aircraft carrier. This is the first reported use of all-digital technology to generate false target radar images of large targets.

Place, publisher, year, edition, pages
2002. Vol. 37, no 6, 751-759 p.
Keyword [en]
digital image synthesis, digital signal processing, electronic warfare, inverse synthetic aperture radar, radar countermeasures, synthetic aperture radar, wideband imaging radar
National Category
Other Engineering and Technologies
Identifiers
URN: urn:nbn:se:fhs:diva-3932DOI: 10.1109/JSSC.2002.1004579ISI: 000175929500009OAI: oai:DiVA.org:fhs-3932DiVA: diva2:628150
Available from: 2013-06-13 Created: 2013-06-11 Last updated: 2013-06-13Bibliographically approved

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